Abstract	What makes up a RF BiCMOS process? What advantages do Silicon and Silicon-Germanium RF BiCMOS processes give to an RFIC designer? What does SiGe do to enhance RF BiCMOS? What types of circuits can be constructed on RF BiCMOS? If CMOS is the technology for RF, why are people using BiCMOS? Why is RFIC BiCMOS process technology continuing to be developed? Modern cost driven communications systems rely on low-cost silicon integrated circuit technologies for all functions; from the front-end receiver and transmitter to the base band signal processing. Today's silicon BiCMOS (Bipolar-CMOS) offers bipolar devices for superior RF and analog circuit functions and CMOS for the ever-increasing digital interface requirements. These devices are combined in high frequency radio frequency integrated circuits (RFICs) to provide low cost complex analog and digital functions. This workshop will begin by describing typical silicon (Si) and silicon-germanium (SiGe) BiCMOS processes that are specifically tailored for RFICs. Not all BiCMOS processes are capable of working well for RFICs, but must often be customized to the particular requirements of high frequency analog circuit applications. The process descriptions will delve into the operating characteristics of the active devices (bipolar and MOS transistors, varactors, etc.), passive components (capacitors, inductors, resistors, etc) and other process related advantages and limitations of BiCMOS processes used for RF circuits. Often these RFIC BiCMOS processes are coupled with analog design techniques that are often unfamiliar to the RF circuit designer. These circuit techniques are employed in addition to familiar RF design techniques to take full advantage of process characteristics. The second half of the workshop will concentrate on RFIC BiCMOS circuit techniques employed by several successful RFIC designers. After each section of the workshop, process descriptions and circuit techniques, a time has been allotted to allow attendees to present questions to the presenters.
Organizer 1	David Lovelace Maxim Integrated Products 531 East Elliot Road Suite 120 Chandler, AZ 85225 d.k.lovelace@ieee.org tel: 480-545-4470 fax: 480-545-4388
Organizer 2	Maxim Integrated Products 120 San Gabriel Drive, MS707 Sunnyvale, CA 94086 Ted_Tewksbury@maximhq.com (408) 737-7600 x6552 Mobile: (617) 803-5785 Pager: (888) 916-3136
Sponsor	RFIC Symposium TPC
Technical level	Tutorial
Day/ Time	Sunday, 11 June 2000, 8:00 am to 5:00 pm
Room	Hynes Convention Center Ballroom A
Speakers	RF BiCMOS Process Technologies at Motorola, Dr. Vida Ilderem, Motorola RF BiCMOS Process Technologies at IBM, Dr. David Greenberg, IBM RF BiCMOS Circuit Design Techniques, Jeff Durec, Motorola RF BiCMOS Circuit Design Techniques, Jean-Marc Mourant, IBM RF BiCMOS Circuit Design Techniques, Jon Strange, Analog Devices RF BiCMOS Circuit Design Techniques, Geoff Dawe, GHz Circuit Design

RF BiCMOS Process Technologies at Motorola, Dr. Vida Ilderem

1. Introduction

1.1. Processes for radio blocks

1.2. Strength and weaknesses of CMOS and BiCMOS for RF

1.3. Elements for RF processes

2. Motorola advanced RFBiCMOS

2.1. Process Features

2.2. Key electrical targets

2.3. Device Mdoule electrical characteristics (Active and passives)

2.4. SiGe:C HBT module

2.5. MIM Module

3. Key RF technology challenges

RF BiCMOS Process Technologies at IBM, Dr. David Greenberg

1. Why pursue a silicon-based BiCMOS RF technology?

2. The silicon germanium HBT: device physics and performance advantages

3. IBM SiGe BiCMOS process highlights and unique features

4. Overview of SiGe BiCMOS electrical parameters across the device library

5. SiGe HBT RF performance data

6. Reliability and yield data

7. Models and design kit capabilities

8. Preview of future generations in development

Mini-Panel Session:

Attendees will have a 45minute session to ask questions of the BiCMOS process speakers.

RF BiCMOS Circuit Design Techniques, Jeff Durec

1. Technology

1.1. IC Process

1.1.1. Active Devices

1.1.2. Passive Devices

1.1.3. Performance Attributes

1.2. Package

1.2.1. Examples

1.2.2. Leadframe

1.3. Layout Techniques

1.3.1. Die Isolation

1.3.2. Isolated Wells

1.3.3. Trench Guard Rings

1.3.4. Substrate Contacts

1.3.5. Epi Bias

1.3.6. Bond Pads

1.3.7. Isolated Supplies

1.3.8. ESD

1.3.9. Routing

1.3.10. Parasitics

2. Circuit block Implementations

2.1. DC Bias

2.1.1. Current Regulation

2.1.2. Enable Circuitry

2.2. LNA

2.2.1. Device Type

2.2.2. Topology

2.2.3. Noise

2.2.4. Linearity

2.2.5. Example

2.3. Mixer

2.3.1. Device Type

2.3.2. Topology

2.3.3. Noise

2.3.4. Linearity

2.3.5. Example

2.3.6. Output Match

2.3.7. Improvements

2.4. Local Oscillator

2.4.1. Device Type

2.4.2. Topology

2.4.3. Noise

2.4.4. Linearity

2.4.5. Example

2.5. LO Amplifier

2.5.1. Device Type

2.5.2. Topology

2.5.3. Noise

2.5.4. Linearity

2.5.5. Example

2.6. Prescaler

2.6.1. Modulus Control Spurs

2.6.2. Input Buffer

3. IC integration

3.1. Purpose

3.2. Limitations

3.3. Examples

3.3.1. 900 MHz Receiver

3.3.2. 900 MHz Transmitter

3.3.3. 800 / 1900 Dual-Band Down-Converter

RF BiCMOS Circuit Design Techniques, Jean-Marc Mourant

1. Integrated VCOs

We will see how the joint use of bipolar devices (as oscillating transistor) and CMOS (as varactors) enables state of the art integrated VCO performance.

2. Variable gain Low Noise Amplifiers

Very linear LNAs are needed for cellular systems such as CDMA. We will discuss the benefits of SiGe bipolars for achieving the low noise and the use of CMOS for the gain variation while preserving linearity.

3. High dynamic range mixers

Mixers with low noise figures and high linearity (IP3) are very much in demand. We will present state of the art bipolar active mixers and CMOS passive mixers. We will discuss their merit and when one or the other should be used.

 

RF BiCMOS Circuit Design Techniques, Jon Strange

Case study: the design of a multi-band transceiver chipset for GSM

1. Sytem Design

2. Circuit Design

2.1. LNA's

2.2. Mixers

2.3. Local Oscillator Circuits

2.4. On-Chip Filters

2.5. Transmitter Circuits

RF BiCMOS Circuit Design Techniques, Geoff Dawe

1. Review and comparison of various enabling technologies from a circuit designers point of view.

2. Current State-of-the-Art in CMOS RF/Mixed Signal Technology.

2.1. Review of RF performance and Mixed Signal Integration Levels.

2.2. Review of selected RF circuit design techniques used in CMOS

3. Current nagging issues.

4. Future Trends.

5. Conclusions

Mini-Panel Session:

Attendees will have a 45minute session to ask questions of the BiCMOS circuit speakers.

Dr. Vida Ilderem, Motorola

Received BS degrees in Physics and EE in 1982 from University of California at Fresno, MS and PhD degrees in EE from Massachusetts Institute of Technology in 1985 and 1988, respectively. Joined National Semiconductor, Washington, in 1988 working on Advanced BiCMOS Technology (ABiC IV). Joined Motorola in 1990 making contributions to variety of device development activities, including 0.6 µm BiCMOS, Graded Channel MOS, and yield enhancement. Presently, RF/IF BiCMOS manager in Digital DNA (TM) Laboratories in Motorola, SPS, responsible for next generation RFBiCMOS technology.

Dr. David Greenberg, IBM

Growing up an avid lover of science, electronics, model building and computer programming, David R. Greenberg began his professional career in earnest at Columbia University under a Pulitzer scholarship, where he earned his B.S. degree in electrical engineering and graduated as valedictorian in 1988. During the summers of 1987 and 1988, David enjoyed internships at AT&T Bell Labs where he programmed an ISDN chip evaluation kit to implement communications protocols and developed a DSP chip development kit from board-level design through DSP-algorithm software. David spent 1988-1990 earning his M.S. in electrical engineering at M.I.T. under Prof. Jesús del Alamo, where he focused on designing, fabricating, and studying the performance-limiting physics behind AlGaAs/InGaAs doped-channel FETs for RF applications and developed his own device simulator and test equipment control tools in the process. David remained in this research group for his Ph.D. from 1990 through 1995 under Hertz and Intel Foundation fellowships, shifting his focus to exploring doped-InP-channel FETs for power amplifier and laser driver applications. David was proud to advise several undergraduates in their senior research projects during this period, one of whom won the department's award for best undergraduate paper. Upon graduation, David joined the IBM Research Division in 1995, where he is a device designer in the SiGe Technology Development Group in East Fishkill, NY. David has played key roles in the development of four generations of SiGe RF technology during his tenure, three of which are currently in the hands of customers. His duties span from device design and layout to interfacing with circuit designers to managing development funding contracts. David also designed and characterized IBM's first power transistors and has played an important role in developing a specialized SiGe process for power amp products. David has authored over twenty journal and conference publications and is a longstanding member of the IEEE.

Jeff Durec, Motorola

Jeff Durec joined Motorola Semiconductor Products Sector in Tempe, AZ in 1991. Since then, he has worked in the area of high-frequency analog integrated circuit design and development. He has been issued eight patents, with 18 additional patents pending. He received his BSEE degree from the University of Illinois --Champagne/Urbana in 1991 and his MSEE from Arizona State University in 1993.

Jean-Marc Mourant, IBM

Jean-Marc Mourant got his MSEE in 1985 from the University of Lille, France. He is presently a design engineer at IBM's Boston's wireless design center. He is involved in RF design with IBM's SiGe BiCMOS technologies. Prior to that he worked at Analog Devices and M/A-COM as an IC designer.

Jon Strange, Analog Devices

Jon Strange received a Bsc in Physics from Durham University, UK in 1984 and a MSc in electrical engineering from Edinburgh university in 1985. Following positions in design and engineering management with Thorn-EMI and LSI Logic he jointly formed Mosaic Microsystems in 1991. This company specialized in the development of analog and RF IC's for communications products. In 1996 Mosaic were acquired by Analog Devices. Since then he has been design centre manager at the Analog Device's Kent design centre, working on the design of highly integrated ICs for future communication products. Most recently he has been responsible for the development of a GSM RF chipset featuring a direct conversion receiver and a novel transmitter.

Geoff Dawe, GHz Circuit Design

Geoff Dawe received the BSEE degree with a minor in computer science from Norwich University, Northfield, VT in 1984. From 1984 to 1996, he held various design engineering and engineering management positions at Alpha Industries, M/A-COM and Analog Devices. In 1996, he founded GHz Circuit Design, Inc., whose charter is to design and develop RF/Mixed Signal products in various enabling technologies. Geoff is a member of the IMS-2000 Steering Committee and is the Central New England MTT-S chapter chairman for 1999-2000. He is an author/co-author of more than 25 technical papers in the area of RF/Microwave and Mixed Signal design.