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WMH: HIGH FREQUENCY DIGITAL BACKPLANE INTERCONNECT CHARACTERIZATION AND DESIGN  

Date & Time: Monday, June 13; 8:00 AM to 12:00 PM

Location: Long Beach Convention Center, Room 202AB

Topics & Speakers:  

  • High Speed Digital Design and Measurements Using VNA and Time Domain Relfectometry, M. Resso, Agilent Tech  Inc.

  • 10 Gb/s Backplane Design Using Full-wave Electromagnetics, L. Williams, Ansoft

  • Obtaining Accurate Device-Only S-Parameter Data Using In-Fixture Measurements Techniques, D. Helster and C. Morgan, Tyco Electronics

  • Smoothline TRL Calibration Technique, Y. Ling, Intel Corp.

  • Measurement Techniques and Results Using 4 & 8 Port VNA Test Systems, T. Ruttan, E Fledell; Intel Corp. and A. Ferrero; Politecnico di Torino

Organizers:

T. Ruttan, Intel Corporation

K. Wong, Agilent Technologies, Inc.  

Sponsors:

MTT-12: Microwave and Millimeter Wave Packaging

The 65th ARFTG symposium  

With microprocessors pushing higher and higher into the GHz range, packaging and interconnects must be taken into consideration along with circuit layout and device characteristics. Backplane designs for computer systems are also migrating to differential bus structures, which imply multi-port design and measurement challenges.  In addition, the design needs to be low cost and suitable for high volume manufacturing.  These are very challenging requirements.  The same design challenges are also applicable to various high frequency digital telecommunication devices and systems.  

In this half-day workshop, the participants will be exposed the language of high speed digital design, the meaning of signal integrity, frequency domain and time domain measurement techniques, multiport measurement techniques, modeling tools and best design practices.

 

IEEE MTT-S RFIC