WSK: DESIGN CONSIDERATIONS AND TOOLS FOR THE SYSTEM LEVEL DESIGN OF RFICS

Date & Time: Sunday, June 12; 1:00 PM to 5:00 PM

Location: Long Beach Convention Center, Room 102C

 Topics & Speakers:  

• RF and Mixed-Signal Integrated Circuit Design Methodology and Challenges, M.Yasunori, Matsushita Electric Industrial Co, Ltd.

• The RF Bottleneck in Wireless Design, J. Hartung, Cadence Design Systems, Inc.

• Early Verification of Emerging UWB and WMAN Radio Systems, A. Amini, Agilent Technologies

Organizers:

A. Dengi, Cadence Design Systems, Inc.

W. Geppert, Infineon Technologies

Sponsors:

MTT-23: RFIC

2005 RFIC Symposium  

The complexity of communication systems is increasing with each generation of communications standards, e.g., 802.11a-> b -> g, 2G -> 2.5G -> 3G, etc. With deep submicron technologies, a significant part of a communication system can now be integrated into one integrated circuit. Shrinking time-to-market requirements combined with the increasing complexity of integrated circuits have necessitated changes and improvements in IC design methodology and supporting design automation tools. System level simulation and verification, signal integrity analysis, unifying system level and circuit level design tools are some of the challenges. This workshop will present some of these design challenges and propose some methodology and design automation solutions for the next generation communications integrated circuits.